The present invention relates to a device testing system, and, more specifically, to a method and apparatus for controlling the power and stabilizing the heat output in a device testing system.
Present day integrated circuits, such as microprocessors, may consume small currents and dissipate small quantities of heat when in power-conserving operating modes, but may consume large currents and dissipate large quantities of heat when performing complex operations. Therefore, when production testing these integrated circuits, the power supplies used in the testing systems for the powering of the device under test (DUT), and the cooling system, must respond to extremely wide ranges of power, current, and heat.
As an example, when the DUT is in a power-conserving mode at start of a test (at cycle zero when measured in units of clock period), the current may be in the 1 to 2 milliamp (mA) range. Continuing the example, only three cycles later (e.g. 30 nanoseconds (nS) at clock frequencies of 100 MegaHertz (MHz)), the current required by the DUT may be as high as 60 Amps. Additionally, the heat dissipated in the example may be only around 3 to 6 milliwatts during cycle zero, but may increase to 50 to 60 watts during cycle three.